MOS semiconductor device having gate insulating film containing nitrogen and method of manufacturing the same

ABSTRACT

Disclosed is a MOS semiconductor device, which comprises a semiconductor substrate; a gate insulating film formed on the semiconductor substrate, the gate insulating film containing nitrogen; a gate electrode selectively formed on the gate insulating film; and an oxide film formed on a surface of the gate electrode and the semiconductor substrate, wherein a thickness of a first portion of the gate insulating film which overlaps vertically the gate electrode is one third or less that of a second portion of the gate insulating film disposed at a corner portion of the gate electrode.  
     According to such constitution of the MOS transistor device of the present invention, by allowing the gate insulating film to contain nitrogen, an increase in a thickness of the gate insulating film toward the semiconductor substrate than required can be suppressed, and hence lowering of a gate voltage can be prevented, resulting in preventing a controllability deterioration of the MOS transistor device.

FIELD OF THE INVENTION

[0001] The present invention relates to a MOS semiconductor device inwhich a post oxide film is formed on a surface of a gate electrode and asemiconductor substrate.

BACKGROUND OF THE INVENTION

[0002] As a method to prevent deterioration in a withstand voltage of agate insulating film of a silicon MOS FET, there has been heretofore atechnology called post oxidation. A post oxide film means an oxide filmformed on a surface of a gate electrode and a semiconductor substrate inorder to protect a gate insulating film in a corner portion of the gateelectrode. An outline of a MOS semiconductor device in which a postoxide film is formed is shown in FIG. 1-A. A post oxide film 128 isformed on a gate electrode 127, an n-type diffusion layer 135, and ap-type diffusion layer 136.

[0003]FIG. 1-B is a section view showing a structure after performing apost oxidation in the manufacturing steps of the MOS semiconductordevice, which shows a corner portion of the gate electrode 127. As shownin FIG. 18, the gate insulating film 125 is formed on a siliconsubstrate 110, and a gate electrode (polysilicon gate electrode) 127formed of polysilicon is selectively formed on the gate insulating film125. Thereafter, a post oxidation is conducted, and then a gate postoxide film 128 is formed on the gate electrode 127 and the semiconductorsubstrate 110.

[0004] In the post oxidation steps for forming such a gate oxide film,also the gate electrode 127 is oxidized together with the siliconsubstrate 110, and hence a thickness of an oxide film in a cornerportion of the gate electrode 127 is increased. Accordingly, the radiusof curvature of the corner portion of the gate electrode 127 becomeslarge, and an electric field concentration at a corner portion of a gateelectrode of a MOS transistor can be avoided.

[0005] Furthermore, it is possible to prevent a deterioration of a gateinsulating film at the corner portion of the gate electrode inmanufacturing steps of the MOS transistor.

[0006] However, in the step for forming the gate post oxide film 128,the silicon substrate 110 is also oxidized together with polysiliconforming the gate electrode 127, and an oxide film 125 having a largerthickness than required is formed in the corner portion of the gateelectrode 127. Thus, because an apparent thickness of the gate electrodeoxide film 125 is large, a voltage applied to the gate oxide film 125 isweakened, and a gate voltage is lowered, resulting in deterioration ofcontrollability of the MOS transistor. When the MOS transistor isoperated in this state, an absolute value of the threshold voltage atthe microfabricated channel region is substantially lowered. For thisreason, an off leak current flowing in turning off the MOS transistormay increase.

[0007] To form an extension diffusion layer 132 of a source/drainelectrode, the post oxide film 128 is used as a protection oxide film inion implantation. In this case, impurity ions are taken into the postoxide film 128, and hence a dose of impurities implanted into thesilicon substrate 110 is reduced. Moreover, for the foregoing reason,ion implantation must be performed in consideration of a thickness ofthe gate post oxide film, and the implanted ions create a wide impuritydistribution. Accordingly, it is impossible to form a precise impurityconcentration profile.

SUMMARY OF THE INVENTION

[0008] One object of the present invention is to provide a semiconductordevice and a manufacturing method for the same, which are capable ofsuppressing occurrence of a leak current at a corner portion of a gateelectrode, and suppressing a reduction in a dose of impurities implantedinto a substrate in ion implantation in forming a source/drain diffusionlayer.

[0009] A semiconductor device of the present invention has the followingconstitution to achieve the foregoing and other objects.

[0010] The semiconductor device of the present invention comprises asemiconductor substrate; a gate insulating film formed on thesemiconductor substrate, the gate insulating film : containing nitrogen;a gate electrode selectively formed on said gate insulating film; and anoxide film formed on a surface of the gate electrode and thesemiconductor substrate, wherein a thickness of a portion of the gateinsulating film closer to the semiconductor substrate is one third orless of that of the gate insulating film closer to a corner portion ofthe gate electrode.

[0011] The gate insulating film is allowed to contain nitrogen, so thatan increase in a thickness of the gate insulating film at the cornerportion of the gate electrode can be controlled. Thus, it is possible toprevent lowering of a gate voltage.

[0012] Furthermore, in the semiconductor device of the presentinvention, the gate insulating film formed under the gate electrode isan oxide film containing nitrogen at a concentration ranging from about2% to 10%.

[0013] By setting the nitrogen concentration at the foregoing range, adielectric constant of the gate insulating film is lowered, and hence areduction in a source-drain current can be prevented.

[0014] Still furthermore, in the semiconductor device of the presentinvention, the gate insulating film has a nitrogen concentration, a peakof which is positioned in the vicinity of the surface of thesemiconductor substrate.

[0015] Since the peak position of the nitrogen concentration is locatedin the surface of the semiconductor substrate, oxidation dose notproceed toward the semiconductor substrate, while allowing oxidationdose proceed toward the side surface of the gate electrode.

[0016] A manufacturing method of the present invention comprises thesteps of: forming a gate insulating film on a semiconductor substrate,the gate insulating film containing nitrogen; forming a gate electrodeselectively on the gate insulating film; and performing a post oxidationafter forming the gate electrode to form an oxide film on a surface ofthe gate electrode and the semiconductor substrate.

[0017] By permitting the gate insulating film to contain nitrogen, it ispossible to suppress an increase in the thickness of the gate insulatingfilm beyond that required, and it is also possible to prevent loweringof the gate voltage while, improving the controllability of the MOStransistor.

[0018] Furthermore, in the manufacturing method of the presentinvention, a thickness of a portion of the gate insulating film closerto the semiconductor substrate is one third or less of a thickness of aportion of the gate insulating film closer to a corner portion of thegate electrode.

[0019] Still furthermore, in the manufacturing method of the presentinvention, the gate insulating film just under the gate electrode is anoxide film containing nitrogen at a concentration ranging from about 2%to 10%.

[0020] Still furthermore, in the manufacturing method of the presentinvention, the gate insulating film has a nitrogen concentration, a peakof which is located in the vicinity of the surface of the semiconductorsubstrate.

[0021] Since a peak position of a nitrogen concentration is located inthe surface of the semiconductor substrate, oxidation which is about toproceed toward the semiconductor substrate can be stopped, whileallowing oxidation to proceed toward the side surface of the gateelectrode.

[0022] Other objects, features, and advantages of the present inventionwill become apparent from the following detailed description. It shouldbe understood, however, that the detailed description and specificexamples, while indicating preferred embodiments of the invention, aregiven by way of illustration only, since various changes andmodifications within the spirit and scope of the invention will becomeapparent to those skilled in the art from this detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] A more complete appreciation of the present invention and many ofits attendant advantages will be readily obtained by reference to thefollowing detailed description considered in connection with theaccompanying drawings, in which;

[0024]FIG. 1-A is a section view showing a conventional MOSsemiconductor device having a gate post oxide film;

[0025]FIG. 1-B is a partially enlarged section view showing a cornerportion of a gate electrode of the MOS semiconductor device shown inFIG. 1-A;

[0026]FIG. 2-A is a section view showing a MOS semiconductor devicehaving a gate post oxide film according to the present invention;

[0027]FIG. 2-B is a partially enlarged section view showing a cornerportion of a gate electrode of the MOS semiconductor device shown inFIG. 2-A;

[0028]FIG. 3 is a section view showing a manufacturing step of thesemiconductor device according to the present invention;

[0029]FIG. 4 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 3;

[0030]FIG. 5 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 4;

[0031]FIG. 6 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 5;

[0032]FIG. 7 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 6;

[0033]FIG. 8 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 7;

[0034]FIG. 9 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 8;

[0035]FIG. 10 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 9;

[0036]FIG. 11 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 10;

[0037]FIG. 12 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 11;

[0038]FIG. 13 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 12;

[0039]FIG. 14 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 13; and

[0040]FIG. 15 is a section view showing a manufacturing step of thesemiconductor device subsequent to that of FIG. 14;

[0041]FIG. 16 is a section view showing a gate corner portion of thesemiconductor device according to the present invention;

[0042]FIG. 17 is a diagram showing a relation between a nitrogenconcentration and a depth extending from a gate oxide film into thesemiconductor substrate;

[0043]FIG. 18 is a section view showing a gate corner portion of thesemiconductor device according to the present invention; and

[0044]FIG. 19 is a diagram showing a correlation between a nitrogenconcentration contained in a gate oxide film of the semiconductor deviceaccording to the present invention and performance of a MOS transistor.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0045] An embodiment of a semiconductor device of the present inventionand a manufacturing method of the same will be described with referenceto the accompanying drawings below.

[0046] As a method to prevent deterioration in a withstand voltage of agate insulating film of a MOS semiconductor device, there has been atechnique called the post oxidation. A post oxidation film is an oxidefilm formed on a surface of a gate electrode and a semiconductorsubstrate in order to protect a gate insulating film located at a cornerportion of the gate electrode. An outline of the MOS semiconductordevice in which a gate post oxide film (hereinafter referred to as apost oxide film 28) is formed is shown in FIG. 2-A.

[0047] A n-type diffusion layer 35 and a p-type diffusion layer 36 areformed in a semiconductor substrate 10, and a gate oxide film 25 and agate electrode 27 are formed on a surface of the semiconductor substrate10. The gate oxide film 25 contains nitrogen at a concentration rangingfrom about 2% to 10%. A post oxide film 28 is formed on a surface of thegate electrode 27, the n-type diffusion layer 35 and the p-typediffusion layer 36.

[0048]FIG. 2-B is a section view showing a structure after performingthe post oxidation in manufacturing steps of a MOS transistor, and acorner portion of a gate electrode 27 is illustrated in detail therein.As shown in FIG. 2-B, a gate insulating film 25 is formed on asemiconductor (silicon) substrate 10, and a gate electrode (polysilicongate electrode) 27 made of polysilicon is selectively formed on the gateinsulating film 25. Thereafter, the gate electrode 27 and a surface ofthe semiconductor substrate 10 is oxidized, thus forming an oxide film28 on the gate electrode 27 and the semiconductor substrate 10.

[0049] In the post oxidizing step for forming the post oxide film 28,also the gate electrode 27 formed of polysilicon is oxidized togetherwith the semiconductor substrate 10, and a thickness of the oxide filmclose to a corner portion of the gate electrode 27 is increasedresulting in warping of the oxide film close to the corner portion ofthe gate electrode 27. Accordingly, the radius of curvature at thecorner portion of the gate electrode 27 becomes larger, and henceelectric field concentration at the corner portion of the gate electrodeof the MOS transistor can be prevented.

[0050] The manufacturing method of the semiconductor device of thepresent invention will be described in accordance with the order of themanufacturing steps in detail. FIGS. 3 to 6 are section views showingmanufacturing steps for forming an element isolation region of thesemiconductor device of the present invention.

[0051] As shown in FIG. 3, a silicon oxide film 11 is first formed on asemiconductor substrate 10, and a silicon nitride film 12 is formed onthe silicon oxide film 11. A silicon oxide film 13 is formed on thesilicon nitride film 12.

[0052] Next, as shown in FIG. 4, a patterned photoresist film 14 isformed on the silicon oxide film 13. The silicon oxide films 11 and 13and the silicon nitride film 12 are selectively removed using thephotoresist film 14 as a mask. Thereafter, the photoresist film 14 isremoved.

[0053] Next, as shown in FIG. 5, the portion of the semiconductorsubstrate 10 corresponding to the element isolation region is removed bya reactive ion etching (RIE) using the silicon oxide films 11 and 13 andthe silicon nitride film 12 as a mask, thus forming a trench 15 in thesemiconductor substrate 10.

[0054] Subsequently, as shown in FIG. 6, a silicon oxide film 16 isformed on the entire surface of the resultant structure so as to fillthe trench 15 with the silicon oxide film 16.

[0055] Next, as shown in FIG. 7, the silicon oxide film 16 is flattenedby a chemical mechanical polishing (CMP) method, and polished until thesurface of the silicon nitride film 12 is exposed.

[0056] Next, the silicon oxide films 11 and 16 and the silicon nitridefilm 12 are removed by wet etching, thus exposing the surface of thesemiconductor substrate 10.

[0057] With such processing, the element isolation region 17 is formedin the semiconductor substrate 10 as shown in FIG. 8, and thereafter asilicon oxide film 18 is formed on the entire surface of the resultantstructure.

[0058] FIGS. 9 to 15 are section views showing formation steps of thegate electrode.

[0059] As shown in FIG. 9, a photoresist film (not shown) patterned isfirst formed on a semiconductor substrate 10. Ion implantation anddiffusion are performed using the photoresist film as a mask, and a Ptype well 21 is formed in the surface of the semiconductor substrate 10.Thereafter, the photoresist film is removed. In the same manner as thatas described above, a patterned photoresist film (not shown) is formedabove the P type well 21. Ion implantation and diffusion are performedusing the photoresist film as a mask, and an N type well 22 is formed inthe surface of the semiconductor substrate 10. Thereafter, thephotoresist film is removed. Subsequently, an n-channel region 23 and ap-channel region 24 are formed in the surfaces of the P and N type wells21 and 22 in the semiconductor substrate 10, respectively. Then, thesilicon oxide film 18 is removed. Next, a gate insulating film 25 isformed on the semiconductor substrate 10. In forming the gate insulatingfilm 25, oxidizing/nitriding reaction is performed using single gas ormixture gas composed of oxygen and nitrogen containing any of NO, N₂Oand NH₃. Accordingly, a gate insulating film 25 formed of a siliconoxide film containing nitrogen at a concentration ranging from about 2%to 10% is formed. Note that a method for forming the gate oxide film 25and a high concentration region is not limited to the above. Forexample, the gate insulating film 25 may be formed in such manner that asilicon oxide film as a base is formed and then the silicon oxide filmis nitrided by gas containing any of the foregoing NO, N₂ and NH₃.

[0060] Subsequently, a polysilicon film 26 is formed on the gateinsulating film 25.

[0061] Next, a photoresist film (not shown) patterned is formed on thepolysilicon film 26. Thereafter, as shown in FIG. 10, the polysiliconfilm 26 and the gate insulating film 25 are selectively removed by RIEusing the photoresist film as a mask. As a result, a polysilicon gateelectrode 27 is formed.

[0062] Subsequently, as shown in FIG. 11, the polysilicon gate electrode27 and the surface of the semiconductor substrate 10 are post-oxidizedby an atmosphere, thus forming a gate post oxide film 28 on the entiresurface of the resultant structure.

[0063] The gate insulating film 25 contains nitrogen, and a nitrogenconcentration at the surface of the gate insulating film 25 in contactwith the semiconductor substrate 10 shows the highest level. Sincenitrogen shows a molecular bond stronger than that of oxygen, oxidationof silicon is suppressed.

[0064] For this reason, although the gate electrode 27 is oxidized,oxidation in the vicinity of the surface of the semiconductor substrate10 is suppressed, and hence growth of the gate post oxide film 28 thesemiconductor substrate 10 is controlled toward. On the contrary, thesurface of the polysilicon gate electrode 27 and the surface of thediffusion layer 32 are more oxidized than the semiconductor substrate 10below the gate electrode 27.

[0065] For example, when oxidation is conducted by annealing underconditions that a temperature is 800° C. and a treatment time is 30minutes, the semiconductor substrate 10 is oxidized by about 6 nm incase where the gate oxide film contains no nitrogen. On the other hand,in the semiconductor device having the gate insulating film 25 of athickness of 3.5 nm, which contains nitrogen at a concentration of about2%, the semiconductor substrate 10 is oxidized by only about 1 nm.

[0066] Next, as shown in FIG. 12, a patterned photoresist film 29 isformed above the P-well 21. Impurities are directed at the surface ofthe semiconductor substrate 10 using the photoresist film 29 as a mask,thus forming a P type extension region 30 in the surface of thesemiconductor substrate 10 corresponding to the N well 22. Thereafter,the photoresist film 29 is removed.

[0067] Subsequently, as shown in FIG. 13, a patterned photoresist film31 is selectively formed above the N well 22. Impurities are directed atthe surface of the semiconductor substrate 10 using the photoresist film31 as a mask, thus forming an N type extension region 32 in the surfaceof the semiconductor substrate 10 corresponding to the P well 21.Thereafter, the photoresist film 31 is removed.

[0068] A silicon nitride film 33 is formed on the entire surface of theresultant structure as shown in FIG. 14.

[0069] The silicon nitride film 33 is selectively removed by RIE, and agate side wall (spacer) 34 is formed on the side wall of the gateelectrode 27, as shown in FIG. 15. Next, a patterned photoresist film(not shown) is selectively formed above the N well 22.

[0070] Impurities are directed at the surface of the semiconductorsubstrate 10 using the photoresist film as a mask, thus forming anN-type diffusion layer 35 in the surface of the semiconductor substrate10 corresponding to the P well 21. Thereafter, the photoresist film isremoved. Next, a patterned photoresist film (not shown) is selectivelyformed above the P well 21. Impurities are directed at the surface ofthe semiconductor substrate 10 using the photoresist film as a mask,thus forming a P type diffusion layer 36 in the surface of thesemiconductor substrate 10 corresponding to the N well 22. Thereafter,the photoresist film is removed.

[0071] The CMOS FET is formed in the above described manner, andthereafter formation of a LSI is completed after performing a silicidestep and a metalization step, which are known.

[0072] A concentration distribution of nitrogen in the semiconductordevice of the present invention will be described with reference toFIGS. 16 and 17. In the present invention, the high concentration regionof nitrogen in the gate insulating film 25 is in contact with thesurface of the semiconductor substrate 10. This is because it ispossible to suppress oxidation of the semiconductor substrate 10 due toexistence of a small quantity of nitrogen in the surface of thesemiconductor substrate 10. Furthermore, silicon nitride shows generallya higher dielectric constant than that of silicon oxide. When thenitrogen content is too much, a dielectric constant of the gate oxidefilm becomes large, and a through current increases. Experiments showthat if the content of nitrogen is about 10%, the through current of theMOS transistor can be suppressed.

[0073] In this embodiment, as shown in FIG. 16, the high concentrationregion of nitrogen is formed on the surface of the gate insulating film25 closer to the semiconductor substrate 10. As shown in FIG. 17, aboundary portion between the surface of the semiconductor substrate 10and the gate insulating film 25 shows the highest nitrogenconcentration.

[0074] A section view of the semiconductor device according to thepresent invention is shown in FIG. 18 in detail. First, an oxide film 28a having a thickness of 2.5 nm is formed on a portion of the surface ofthe semiconductor substrate 10, which does not overlap vertically thepolysilicon gate electrode 27, and an oxide film 28 b having a thicknessof 1 nm or less is formed on another portion of the surface of thesemiconductor substrate 10, which overlaps vertically the polysilicongate electrode 27. An oxide film 28 c having a thickness of 12 nm isformed on the side surface of the polysilicon gate electrode 27, and anoxide film 28 d having a thickness of 3 nm or more is formed on thecorner portion of the polysilicon gate electrode 27, which overlapsvertically the gate insulating film 25. As described above, withreference to the gate insulating film 25 formed on the corner portion ofthe gate electrode 27, the thickness of the oxide film 28 b is one thirdor less than the thickness of the oxide film 28 d. When the gate oxidefilm does not contain nitrogen, the thickness of the oxide film 28 bincreases.

[0075]FIG. 19 is a diagram showing a correlation between a nitrogenconcentration contained in the gate insulating film and a performance ofthe MOS transistor in the semiconductor device of the present invention.In FIG. 19, the abscissa shows a concentration (%) of nitrogen containedin the gate insulating film, the ordinate shows a gate leakage currentindicated by ◯ and a drain current degradation ratio indicated by ▪. Thedrain current degradation ratio is a ratio in which the drain current isset to 1 when the nitrogen concentration is 0%.

[0076] As the nitrogen concentration increases, the leakage currentreduces. However, the drain current reduces. Since the drain current isproportional to a driving force, a driving force of the MOS transistorreduces. Although the leakage current should be small, too large anincrease in the nitrogen concentration causes the MOS transistor to beincapable of operating. When it is supposed that a limitation of thedrain current degradation is 10%, the concentration of nitrogencontained in the gate oxide film should be about 2% to 10%.

[0077] According to the present invention, as shown in FIG. 2-B,although the oxidation in the side wall of the gate electrode 27proceeds in forming the post oxide film, the oxidation toward thesemiconductor substrate 10 can be controlled because of the existence ofthe high concentration region 40 containing nitrogen in the surface ofthe semiconductor substrate 10. Accordingly, an increase in thethickness of the oxide film in the corner portion of the gate electrode27 can be controlled to approximately half compared to the prior art. Inother words, leakage of lines of electric force due to the increase ofthe thickness of the oxide film in the corner portion of the gateelectrode 27 can be controlled. Accordingly, lowering of a gate voltagecan be prevented and controllability of the transistor can be improved.Furthermore, when the extension diffusion layer of the source/drainelectrode is formed, the gate insulating film is used as the protectionoxide film in ion implantation. Since the increase in the thickness ofthe gate insulating film is controlled, it is possible to prevent thereduction in the dose of impurities implanted into the semiconductorsubstrate. Therefore, fly distances of ions can be shortened compared tothe prior art, so that the wide dispersions of the ions implanted can becontrolled. Thus, it is possible to form the precise impurityconcentration profile.

[0078] In the corner portion of the gate electrode 27, the radius ofcurvature of the corner portion of the gate electrode 27 becomes largedue to the oxidation, the electric field concentration in the cornerportion of the gate electrode 27 can be relaxed. Note that the methodfor oxidizing the gate electrode is not limited to annealing, and thegate electrode may also be oxidized by RTO (Rapid Thermal Oxidation)performed under conditions that a temperature is, for example, 1053° C.and a processing time is, for example, 50 seconds.

[0079] As described above, according to the present invention, thesemiconductor device and the manufacturing method of the same can beprovided, which are capable of controlling the occurrence of the leakagecurrent at the corner portion of the gate electrode and the reduction inthe dose of the impurities implanted into the semiconductor substrateduring ion implantation in forming the source/drain diffusion layer.

[0080] While there has been illustrated and described what are presentlyconsidered to be preferred embodiments of the present invention, it willbe understood by those skilled in the art that various changes andmodifications may be made, and equivalents may be substituted fordevices thereof without departing from the true scope of the invention.In addition, many modifications may be made to adapt a particularsituation or material to the teaching of the present invention withoutdeparting from the central scope thereof. Therefore, it is intended thatthis invention not be limited to the particular embodiment disclosed asthe best mode contemplated for carrying out this invention, but that theinvention includes all embodiments falling within the scope of theappended claims.

What is claimed is:
 1. A semiconductor device, comprising: asemiconductor substrate; a gate insulating film on said semiconductorsubstrate, the gate insulating film containing nitrogen; a gateelectrode on said gate insulating film; and an oxide film on a surfaceof said gate electrode and said semiconductor substrate, wherein saidgate insulating film has a first portion under a center portion of saidgate electrode and a second portion under an edge of said gateelectrode, said second portion being thicker than said first portion, afirst surface and a second surface of said first portion defining firstand second parallel lines that intersect said second portion, said firstparallel line being between said first portion and said substrate, saidsecond parallel line being between said first portion and said gateelectrode, a thickness of said second portion between said firstparallel line and said substrate being one third or less than athickness of said second portion between said second parallel line andsaid gate electrode.
 2. The semiconductor device according to claim 1,wherein said gate insulating film is an oxide film containing nitrogenat a concentration ranging from about 2 to 10%.
 3. The semiconductordevice according to claim 1, wherein said gate insulating film has anitrogen concentration showing a peak in near a surface of saidsemiconductor substrate.
 4. The semiconductor device according to claim1, wherein said gate insulating film and said oxide film are formed indifferent steps.
 5. A semiconductor device, comprising: a semiconductorsubstrate; a gate insulating film on said semiconductor substrate, thegate insulating film containing nitrogen; a gate electrode on said gateinsulating film; an oxide film on a surface of said gate electrode andsaid semiconductor substrate; and a gate side wall film on a surface ofsaid oxide film.
 6. The semiconductor device according to claim 5,wherein said gate insulating film located just under said gate electrodeis an oxide film containing nitrogen at a concentration ranging fromabout 2 to 10%.
 7. The semiconductor device according to claim 5,wherein said gate insulating film has a nitrogen concentration showing apeak near a surface of said semiconductor substrate.
 8. Thesemiconductor device according to claim 5, wherein said gate insulatingfilm has a first portion under a center portion of said gate electrodeand a second portion under an edge of said gate electrode, said secondportion being thicker than said first portion, a first surface and asecond surface of said first portion defining first and second parallellines that intersect said second portion, said first parallel line beingbetween said first portion and said substrate, said second parallel linebeing between said first portion and said gate electrode, a thickness ofsaid second portion between said first parallel line and said substratebeing one third or less than a thickness of said second portion betweensaid second parallel line and said gate electrode.
 9. A method formanufacturing for a semiconductor device, comprising the step of:forming a gate insulating film on a semiconductor substrate, the gateinsulating film containing nitrogen; selectively forming a gateelectrode on said gate insulating film; and oxidizing said gateelectrode and a surface of said semiconductor substrate, thus forming anoxide film on a surface of said gate electrode and a surface of saidsemiconductor substrate.
 10. The manufacturing method of a semiconductordevice according to claim 9, wherein said gate insulating film has afirst portion under a center portion of said gate electrode and a secondportion under an edge of said gate electrode, said second portion beingthicker than said first portion, a first surface and a second surface ofsaid first portion defining first and second parallel lines thatintersect said second portion, said first parallel line being betweensaid first portion and said substrate, said second parallel line beingbetween said first portion and said gate electrode, a thickness of saidsecond portion between said first parallel line and said substrate beingone third or less than a thickness of said second portion between saidsecond parallel line and said gate electrode.
 11. The manufacturingmethod of a semiconductor device according to claim 9, wherein said gateinsulating film located just under said gate electrode is an oxide filmcontaining nitrogen at a concentration ranging from about 2% to 10%. 12.The manufacturing method of a semiconductor device according to claim 9,wherein said gate insulating film has a nitrogen concentration showing apeak near a surface of said semiconductor substrate.
 13. Thesemiconductor device according to claim 6, said semiconductor devicefurther comprising: a side wall film formed on a surface of said oxidefilm.
 14. The semiconductor device according to claim 6, saidsemiconductor device further comprising: said oxide film is postoxidation film.